As you know (or have you forgotten as I told you?), Intel processors use a segmented memory model. That means that every address consists of a segment and an offset. Together they form the linear address. In real mode this quite simple: The linear address is obtained by (seg << 4) + offs. Protected mode goes a different way: It's using segment descriptors. A segment descriptor is a quadword structure. There are different types of descriptors: Let's start with the easy ones.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | byte address |
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segment base 15..0 | segment limit 15..0 | 0 | ||||||||||||||||||||||||||||||
segment base 31..24 | G | D | 0 | AVL | segment limit 19..16 | P | DPL | S | type | A | segment base 23..16 | +4 |
Code segment descriptors contain information about a code segment, i.e. a segment containing executable code.